INTRODUCTION INTR TO DFT

• ASIC Flow
• DFT Basics
• Chip Fabrication Process

SCAN INSERTION

• Scan architecture overview
• Scan Golden Rules
• Scan Insertion Flow
• Generate test protocol and understanding
• Lock-Up Latches
• TCL Scripting

SCAN COMPRESSION

• Basics/Need for Compression
• Compression Techniques
• Compression Types
• TCL Scripting

AT-SPEED TESTING

• On-Chip-Clocking
• LOC and LOS

INTRODUCTION TO ATPG

• ATPG Basics
• Faults Collapsing
• ATPG Models

FAULT MODELS, FAULT CLASSES

• Fault Models
• ATPG DRC
• Fault Classes

PATTERN GENERATION AND SIMULATIONS

• Simulation Basics
• Atpg Simulations
• Coverage Improvement

JTAG & BIST: BUILT IN SELF TEST

• BIST Architecture
• Memory BIST
• Memory Faults